基于FPGA的星载图像压缩系统实现方法研究的中期报告.docx
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基于FPGA的星载图像压缩系统实现方法研究的中期报告.docx

基于FPGA的星载图像压缩系统实现方法研究的中期报告.docx

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基于FPGA的星载图像压缩系统实现方法研究的中期报告IntroductionTheaimofthisprojectistodevelopasatelliteimagecompressionsystemusingField-ProgrammableGateArray(FPGA).Thesystemwillcompressthesatelliteimagedataandtransmititbacktothegroundstationforfurtherprocessing.ThisprojectinvolvesimplementingacompressionalgorithmonFPGA,interfacingitwiththeimagesensorandtransmittingthecompresseddatausingacommunicationprotocol.Inthemid-termreport,theprogressmadeintheprojectandthefutureplanarediscussed.LiteratureReviewTheexistingliteraturesuggeststhattherearemanyimagecompressionalgorithmsthatcanbeusedtocompresssatelliteimagedata.SomeofthecommonlyusedalgorithmsareHuffmancoding,DiscreteCosineTransform(DCT),andRun-lengthencoding(RLE).Eachalgorithmhasitsadvantagesanddisadvantages,anditseffectivenessvariesdependingonthetypeofimagedata.FPGAisaversatilehardwareplatformthatcanbeusedtoimplementcustomlogiccircuits.TheFPGAcanbeprogrammedtoperformparallelprocessing,makingitanidealplatformforimplementingimagecompressionalgorithms.TheuseofFPGAinimagecompressionhasbeeninvestigatedinvariousstudies,andithasbeenfoundthatFPGAcanofferhighperformanceandlowpowerconsumption.MethodologyTheprojectinvolvesthefollowingsteps:1.Selectingtheimagecompressionalgorithm:Consideringthesuitabilityofthealgorithmtothesatelliteimagedata,thealgorithmforthecompressionsystemisselected.2.Implementationofthealgorithm:TheselectedalgorithmisimplementedontheFPGAusingHardwareDescriptionLanguage(HDL).Theimplementationincludesdesigninglogiccircuitsandverifyingtheiroperation.3.Interfacingwiththeimagesensor:TheFPGAisinterfacedwiththeimagesensortoreceivetheimagedataandtransmitthecompresseddata.4.Transmittingthecompresseddata:Thecompresseddataistransmittedusingacommunicationprotocolbetweenthesatelliteandgroundstation.ProgressmadeTheprojecthasmadethefollowingprogresssofar:1.TheHuffmancodingalgorithmhasbeenselectedfortheproject,consideringitseffectivenessincompressingimagedata.2.TheHuffmancodingalgorithmhasbeenimplementedontheFPGAusingVHDL.3.Atestb