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第十章OutlinesVerificationvs.TestTestingPrincipleAutomaticTestEquipment(ATE)OverviewofICTestingTestChallengesOutlinesTypesofTestVectorSetsWhyModelFaults?Defect&FaultModelingDefinitionDefect:shorttothegrandFault:signalbstuckatlogic0Error:happenswhena=1b=1FaultModelsStuck-ATFaultsTransitionDelayFaultPathDelayFaultMemoryFaultsMemoryFault–cont.OutlinesFaultCoverageTestGenerationDefinitionsVectorGenerationUsingATPGToolOutlinesWhatisDFT?WhyAddtestLogic?Pro&ConPerceptionsofDFTPopularDFTTechniquesforSoCTestingScanChainSequentialLogic–HardtoTest!StepsofScanDesignScanFlip-Flop(SFF)ScanChainConnectionTestSequentialLogicUsingScanToolsforScanSynthesisandATPGScanDesignRulesBasicScanDesignRulesExample:DealingwithTri-statebusExample:DealingwithBlackBoxExample:MemoryBlockInterfaceGeneralDFTConsiderationforSoCDesignPrepareScanwrappersfornon-synthesizablemodules,suchasmemoryblockAvoidlongscanchain,max1000FFsperchainAvoidpowerconsumptionissue,mayneedtoseparatethewholechiptofewscanmodesandtheclockstothemodulenotbeingtestedshouldbedisabledScanchainreorderingmayneedinlayoutstageScanOverhead:Scanpathimpacttiming,areaandpowergoalsModerateareaoverheadabout10%,speed5%Multiplexerdelayaddedincombinationalpath;approx.twogate-delaysFlip-flopoutputloadingduetooneadditionalfanout;approx.5-6%Atleastoneextrapinsforscanmodesignals:scan_mode,scan_enable,scan_clk,scan_reset,scan_in,scan_outScanDesignFlowTypicalQualityRequirementsSummaryMemoryBuild-in-selftest(MVIST)ImportanceofMemoryTestMemoryModelMemoryBuiltInSelfTest(MBIST)MemoryBuiltInSelfTest(MBIST)BasicTestPortsMemoryBISTAlgorithmsCheckerboardAlgorithmMarchAlgorithmAlgorithmMATSMATS+MATS++MARCHXMARCHC—MARCHAMARCHYMARCHBMarchTestComplexityRetentiontestingverifiesifmemorycellscanretaintheirinitialcontentsforacertainperiodoftime.Thetimeperiodcanvaryfrom10-80msdependingmainlyonthemanufacturingprocessandtheambienttemperatureduringthetestapplicationTheinserteddelaycanrefertotheAlgorithmMarchCandCheckerboardSharecontrollerwithmemoryblo
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