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Hex/QuadDFlip-FlopswithClear54LS174/DM54LS174/DM74LS174,54LS175/DM54LS175/DM74LS175June198954LS174/DM54LS174/DM74LS174,54LS175/DM54LS175/DM74LS175Hex/QuadDFlip-FlopswithClearGeneralDescriptionFeaturesThesepositive-edge-triggeredflip-flopsutilizeTTLcircuitryYLS174containssixflip-flopswithsingle-railoutputstoimplementD-typeflip-floplogic.AllhaveadirectclearYLS175containsfourflip-flopswithdouble-railoutputsinput,andthequad(175)versionsfeaturecomplementaryYBufferedclockanddirectclearinputsoutputsfromeachflip-flop.YIndividualdatainputtoeachflip-flopInformationattheDinputsmeetingthesetuptimerequire-YApplicationsinclude:mentsistransferredtotheQoutputsonthepositive-goingBuffer/storageregistersedgeoftheclockpulse.Clocktriggeringoccursataparticu-ShiftregisterslarvoltagelevelandisnotdirectlyrelatedtothetransitionPatterngeneratorstimeofthepositive-goingpulse.WhentheclockinputisatYTypicalclockfrequency40MHzeitherthehighorlowlevel,theDinputsignalhasnoeffectYTypicalpowerdissipationperflip-flop14mWattheoutput.YAlternateMilitary/Aerospacedevice(54LS174,54LS175)isavailable.ContactaNationalSemiconduc-torSalesOffice/Distributorforspecifications.ConnectionDiagramsDual-In-LinePackageDual-In-LinePackageTL/F/6404±1TL/F/6404±2OrderNumber54LS174DMQB,54LS174FMQB,OrderNumber54LS175DMQB,54LS175FMQB,54LS174LMQB,DM54LS174J,54LS175LMQB,DM54LS175JDM54LS174W,DM74LS174MorDM74LS174NDM54LS175W,DM74LS175MorDM74LS175NSeeNSPackageNumberE20A,J16A,SeeNSPackageNumberE20A,J16A,M16A,N16EorW16AM16A,N16EorW16AFunctionTable(EachFlip-Flop)InputsOutputsHeHighLevel(steadystate)LeLowLevel(steadystate)ClearClockDQQ²XeDon'tCareLXXLHueTransitionfromlowtohighlevelHHHLQ0eThelevelofQbeforetheindicatedsteady-stateinputconditionswereuestablished.HLLHu²eLS175onlyHLXQ0Q0C1995NationalSemiconductorCorporationTL/F/6404RRD-B30M105/PrintedinU.S.A.AbsoluteMaximumRatings(Note)IfMilitary/Aerospacespecifieddevicesarerequired,Note:The``AbsoluteMaximumRatings''arethosevaluespleasecontac
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