libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;entityTopisPort(clk:instd_logic;Ll1,Lh1,Ll2,Lh2,Ll3,Lh3:outstd_logic_vector(6downto0));end;architectureBhvofTopiscomponentdvfisPort(clk:instd_logic;fout:outstd_logic);endcomponentdvf;componentDecL7SISPORT(A:INSTD_LOGIC_VECTOR(3DOWNTO0);LED7S:OUTSTD_LOGIC_VECTOR(6DOWNTO0));ENDcomponentDecL7S;componentmycount_xisPort(clk:instd_logic;d:instd_logic_vector(7downto0);cnt:outstd_logic_vector(7downto0);o:outstd_logic);endcomponentmycount_x;signalk,l,m,n,u,v,w:std_logic_vector(7downto0);signalh,i,j:std_logic;beginm<=x"3b";n<=x"17";U0:dvfportmap(clk=>clk,fout=>h);U1:mycount_xportmap(clk=>h,d=>m,cnt=>u,o=>i);U2:DecL7Sportmap(A=>u(7downto4),LED7S=>Lh1);U3:DecL7Sportmap(A=>u(3downto0),LED7S=>Ll1);U4:mycount_xportmap(clk=>i,d=>m,cnt=>v,o=>j);U5:DecL7Sportmap(A=>v(7downto4),LED7S=>Lh2);U6:DecL7Sportmap(A=>v(3downto0),LED7S=>Ll2);U7:mycount_xportmap(clk=>j,d=>n,cnt=>w);U8:DecL7Sportmap(A=>w(7downto4),LED7S=>Lh3);U9:DecL7Sportmap(A=>w(3downto0),LED7S=>Ll3);endbhv;LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYDecL7SISPORT(A:INSTD_LOGIC_VECTOR(3DOWNTO0);LED7S:OUTSTD_LOGIC_VECTOR(6DOWNTO0));END;ARCHITECTUREoneOFDecL7SISSignalsLED7S:STD_LOGIC_VECTOR(7DOWNTO0);BEGINLED7S<=sLED7S(6DOWNTO0);PROCESS(A)BEGINCASE(A)ISWHENx"0"=>sLED7S<=x"3f";WHENx"1"=>sLED7S<=x"06";WHENx"2"=>sLED7S<=x"5B";WHENx"3"=>sLED7S<=x"4F";WHENx"4"=>sLED7S<=x"66";WHENx"5"=>sLED7S<=x"6D";WHENx"6"=>sLED7S<=x"7D";WHENx"7"=>sLED7S<=x"07";WHENx"8"=>sLED7S<=x"7F";WHENx"9"=>sLED7S<=x"6F";WHENx"A"=>sLED7S<=x"77";WHENx"B"=>sLED7S<=x"7c";WHENx"C"=>sLED7S<=x"39";WHENx"D"=>sLED7S<=x"5E";WHENx"E"=>sLED7S<=x"79";WHENOTHERS=>sLED7S<=x"71；ENDCASE;ENDPROCESS;END;libraryIEEE;useIEEE.STD_LOGIC_1164.ALL;useIEEE.STD_LOGIC_UNSIGNED.ALL;entitydvfisPort(clk:instd_logic;fout:outstd_logic);enddvf;architectureBhvofdvfisbeginprocess(clk)variablecnt8:std_logic_vector(7downto0);beginif(clk'eventandclk='1