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designfeatureByMikeStein,ParadigmWorksASDIGITALDESIGNBECOMESINCREASINGLYSOPHISTICATED,CIRCUITSWITHMULTIPLECLOCKSMUSTRELIABLYCOMMUNICATEWITHEACHOTHER.Crossingtheabyss:asynchronoussignalsinasynchronousworldnlythemostelementarylogiccircuitsuseaogy,operatingconditions,andtheloadontheout-singleclock.Mostdata-movementapplica-putforoutputsthatarenotbuffered.SharpedgeOtions,includingdisk-drivecontrollers,CD-ratesontheinputsignalminimizethewindow.MoreROM/DVDcontrollers,modems,networkinter-windowsofvulnerabilityariseastheclockfrequen-faces,andnetworkprocessors,bearinherentcyincreases,andtheprobabilityofhittingthewin-challengesmovingdataacrossmultipleclockdo-dowincreasesasthedatafrequencyincreases.mains.WhensignalstravelfromoneclockdomainFPGAmanufacturersandICfoundriesqualifytoanother,thesignalappearstobeasynchronoustheirflip-flopsanddeterminetheircharacteristics.inthenewclockdomain.“MTBF”(meantimebetweenfailures)describestheInmodernIC,ASIC,andFPGAdesigns,engineersmetastabilitycharacteristicofaflip-flopusingsta-havemanysoftwareprogramstohelpthemcreatetisticstodeterminetheprobabilityofaflip-flop’smillion-gatecircuits,buttheseprogramsdonotfailure.ManufacturersbasetheMTBFinpartonthesolvetheproblemofsignalsynchronization.Itisuplengthofthetimewindowduringwhichachangeintothedesignertoknowreliabledesigntechniquestheinputsignalcausestheflip-floptobecomeun-thatreducetheriskoffailureforcircuitscommu-stable.Inaddition,MTBFcalculationusesthefre-nicatingacrossclockdomains.quencyoftheinputsignalandthefrequencyoftheclockdrivingtheflip-flop.FUNDAMENTALSEachtypeofflip-flopinanASICorFPGAlibraryThefirststepinmanagingmulticlockdesignsishastimingrequirementstohelpyoudeterminethetounderstandtheproblemofsignalstability.Whenwindowofvulnerability.“Setuptime”describestheasignalcrossesaclockdomain,itappearstothecir-timeaninputsignaltoaflip-flopmustbestablebe-cuitryinthenewclockdomainasanasynchronousforetheclockedge.“Holdtime”isthetimethesig-signal.Thecircuitthatreceivesthi
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