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JINGFENGLIEnglishName：JoeyTel：+8613958036362Email：ae87@sohu.comJOBOBJECTIVE:Application(AP)Application(MCU)EducationBackground&REWARDS2009-2012ZhejiangUniversityElectronicInformationTechnologyandInstrumentsmasterFirst-classGrantforPostgraduatesofElectronicInformationTechnologyandInstruments2005-2009ZhejiangUniversityElectronicInformationTechnologyandInstrumentsbachelorCourses:DigitalElectronicTechnology,AnalogElectronicTechnology,Circuittheory,DigitalSignalProcessingRankofMajor:15%TECHNOLOGYSUMMARY&ENGLISHSKILLSFamiliarwithprocedureofhardwaresystemdesign,proficiencyincomplexdigitalcircuitidesignanddebug，havelabequipmentexperiencesuchasoscilloscope.Knowledgeofsignalintegritytheory,analoganddigitalcircuittheory,EMI/EMCtheory.ProficiencyinCadence,havehighspeedPCBdesignexperience(6/8layers).FamiliarwithVerilogHDLanddevelopmentenvironmentofXilinx，LatticeFPGA/CPLD.EnglishSkill：CET-6（490）,FluentEnglishinreading,writingandspeaking.PROJECTEXPERIENCE2010.06-2010.10:《4-ChannelD1VideoEncoder》ProjectDescription：Thissystemcaptures4channelPAL/NTSCD1videosignal,convertsitintoBT656formatdataandtransmitsittoaDSP.ThisDSPexecutesencodingprocessandoutputsstreamtodecodersvia1000MEthernetorfiber-opticnet.HardwareEnvironment:TIDSPTMS320DM6467+TI4-ChannelPAL/NTSCVideoDecoderTVP5158Responsibility&Contribution:Discussanddefineprojectdemand.Accomplishschematicdesign,PCBlayoutanddebug.AccomplishCPLDlogicaldesign.Accomplishthehardwaretestandtestreport.2010.11-2011.02:《16-ChannelD1VideoDecoder》ProjectDescription：Thissystemacceptsvideostreamvia1000MEthernetorfiber-opticnet,processorMPC8377transmitsthestreamtofourDSPsviaPCIinterface.EveryDSPexecutesdecodingprocessandoutputsthevideodatatoaFPGA,thisFPGAdividesthevideodataintofourchannelsBT656formatdataandoutputsthemtofourDACsrespectively,theseDACsoutputD1videosignal.FourDSPssupport16channelD1videooutput.HardwareEnvironment:FreescalePowerQUICCProcessorMPC8377+TIDSPTMS320DM6467.Responsibility&Contribution:Discussanddefineproje
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