2.1系统设计要求2.2系统设计方案图2.1彩灯控制器组成原理图2.3主要VHDL源程序CLR:INSTD_LOGIC;CLK:OUTSTD_LOGIC);ENDENTITYSXKZ;ARCHITECTUREARTOFSXKZISSIGNALCLLK:STD_LOGIC;BEGINPROCESS(CLK_IN,CLR,CHOSE_KEY)ISVARIABLETEMP:STD_LOGIC_VECTOR(2DOWNTO0);BEGINIFCLR='1'THEN--当CLR='1'时清零，否则正常工作CLLK<='0';TEMP:="000";ELSIFRISING_EDGE(CLK_IN)THENIFCHOSE_KEY='1'THENIFTEMP="011"THENTEMP:="000";CLLK<=NOTCLLK;ELSETEMP:=TEMP+'1';ENDIF;--当CHOSE_KEY='1'时产生基准时钟频率的1/4的时钟信号，否则产生基准时钟--频率的1/8的时钟信号ELSEIFTEMP="111"THENTEMP:="000";CLLK<=NOTCLLK;ELSETEMP:=TEMP+'1';ENDIF;ENDIF;ENDIF;ENDPROCESS;CLK<=CLLK;ENDARCHITECTUREART;2.3.2显示控制电路的VHDL源程序--XSKZ.VHDLIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYXSKZISPORT(CLK:INSTD_LOGIC;CLR:INSTD_LOGIC;LED:OUTSTD_LOGIC_VECTOR(15DOWNTO0));ENDENTITYXSKZ;ARCHITECTUREARTOFXSKZISTYPESTATEIS(S0,S1,S2,S2,S4,S5,S6);SIGNALCURRENT_STATE:STATE;SIGNALFLOWER:STD_LOGIC_VECTOR(15DOWNTO0);BEGINPROCESS(CLR,CLK)ISCONSTANTF1:STD_LOGIC_VECTOR(15DOWNTO0):="0001000100010001";CONSTANTF2:STD_LOGIC_VECTOR(15DOWNTO0):="1010101010101010";CONSTANTF2:STD_LOGIC_VECTOR(15DOWNTO0):="0011001100110011";CONSTANTF4:STD_LOGIC_VECTOR(15DOWNTO0):="0100100100100100";CONSTANTF5:STD_LOGIC_VECTOR(15DOWNTO0):="1001010010100101";CONSTANTF6:STD_LOGIC_VECTOR(15DOWNTO0):="1101101101100110";--六种花型的定义BEGINIFCLR='1'THENCURRENT_STATE<=S0;ELSIFRISING_EDGE(CLK)THENCASECURRENT_STATEISWHENS0=>FLOWER<="ZZZZZZZZZZZZZZZZ";CURRENT_STATE<=S1;WHENS1=>FLOWER<=F1;CURRENT_STATE<=S2;WHENS2=>FLOWER<=F2;CURRENT_STATE<=S2;WHENS2=>FLOWER<=F2;CURRENT_STATE<=S4;WHENS4=>FLOWER<=F4;CURRENT_STATE<=S5;WHENS5=>FLOWER<=F5;CURRENT_STATE<=S6;WHENS6=>FLOWER<=F6;CURRENT_STATE<=S1;ENDCASE;ENDIF;ENDPROCESS;LED<=FLOWER;ENDARCHITECTUREART;2.3.3整个电路系统的VHDL源程序--CDKZQ.VHDLIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYCDKZQISPORT(CLK_IN:INSTD_LOGIC;CLR:INSTD_LOGIC;CHOSE_KEY:INSTD_LOGIC;LED:OUTSTD_LOGIC_VECTOR(15DOWNTO0));ENDENTITYCDKZQ;ARCHITECTUREARTOFCDKZQISCOMPONENTSXKZISPORT(CHOSE_KEY:INST